A-D Scan Mode Registers - Renesas M32R/ECU Series User Manual

Mitsubishi 32-bit risc single-chip microcomputers
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11

11.2.3 A-D Scan Mode Registers 0

A-D0 Scan Mode Register 0 (AD0SCM0)
A-D1 Scan Mode Register 0 (AD1SCM0)
b0
1
2
ADCTRG1
ADCMSL
ADCTRG0
ADSHIDE
0
0
0
b
Bit Name
0
ADCTRG1 (Note 1)
A-D hardware trigger select 1 bit
1
ADCMSL
A-D scan mode select bit
2
ADCTRG0 (Note 1)
A-D hardware trigger select 0 bit
3
ADCSEL
A-D conversion start trigger select bit
4
ADCREQ
Interrupt/DMA transfer request select bit
5
ADCCMP
A-D conversion completed bit
6
ADCSTP
A-D conversion stop bit
7
ADCSTT
A-D conversion start bit
Note 1: Two bits—A-D hardware trigger select 1 (bit 0) and A-D hardware trigger select 0 (bit 2)—are used to select an A-D
hardware trigger.
A-D Scan Mode Registers 0 are used to control operation of the A-D Converters during scan mode.
(1) ADCTRG (A-D Hardware Trigger Select) bits (Bits 0 and 2)
These bits select a hardware trigger when A-D conversion by the A-D Converter is to be started in hardware.
Select one from the following hardware trigger sources:
A-D0 Converter: Input event bus 2
The contents of these bits are ignored if a software trigger is selected by ADCSEL (A-D conversion start
trigger select bit).
3
4
5
6
ADCREQ
ADCCMP
ADCSTP
ADCSTT
0
0
1
0
Input event bus 3
Output event bus 3
TIN23 edge select output
11.2 A-D Converter Related Registers
b7
0
Function
Bits 0 and 2 are used to select an A-D hardware trigger.
b0 b2
A-D0 Converter
0
0
: Input event bus 2
0
1
: Input event bus 3
1
0
: Output event bus 3
1
1
: TIN23S signal
0: Single-shot mode
1: Continuous mode
Bits 0 and 2 are used to select an A-D hardware trigger.
(See the column for bit 0.)
0: Software trigger
1: Hardware trigger
0: A-D conversion interrupt request
1: DMA transfer request
0: A-D conversion in progress
1: A-D conversion completed
0: No operation
1: Stop A-D conversion
0: No operation
1: Start A-D conversion
A-D1 Converter: Input event bus 2
11-20
A-D Converters
<Address: H'0080 0084>
<Address: H'0080 0A84>
<After reset: H'04>
R
R
A-D1 Converter
Input event bus 2
Input event bus 3
TID1_udf/ovf
TIN23S signal
R
R
R
R
R
0
0
Input event bus 3
TID1 underflow/overflow
TIN23 edge select output
32180 Group User's Manual (Rev.1.0)
W
W
W
W
W
W
W
W

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