Renesas M32R/ECU Series User Manual page 138

Mitsubishi 32-bit risc single-chip microcomputers
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6
Flash Control Register 3 (FCNT3)
b0
1
2
0
0
0
b
Bit Name
0–6
No function assigned. Fix to "0".
7
FELEVEL
Erase margin-up bit
Flash Control Register 3 (FCNT3) controls the depth of erase levels when erasing the internal flash memory with one
of erase commands. The internal flash memory erase level can be deepened by setting the FELEVEL bit to "1".
Flash Control Register 4 (FCNT4)
b8
9
10
0
0
0
b
Bit Name
8–14
No function assigned. Fix to "0".
15
FRESET
Flash reset bit
Flash Control Register 4 (FCNT4) controls initializing each status bit of Flash Status Register 2 (FSTAT2) or
canceling a programming/erase operation.
Setting the FRESET bit to "1" initializes each status bit of the FSTAT2 register or cancels a programming/erase
operation.
The FRESET bit is effective only when the FENTRY bit = "1". If the FENTRY bit = "0", the FRESET bit informa-
tion is ignored.
When programming or easing the internal flash memory, make sure the FRESET bit remains "0".
An example for clearing each status of FSTAT2 during a programming/erase operation, and an example for
forcibly terminating (canceling) a programming/erase operation due to time-out are shown below.
6.4 Registers Associated with the Internal Flash Memory
<Address: H'0080 01E4>
3
4
5
6
FELEVEL
0
0
0
0
11
12
13
14
FRESET
0
0
0
0
b7
0
Function
0: Normal level
1: Raise erase margin up
b15
0
Function
0: No operation
1: Reset
6-9
INTERNAL MEMORY
<After reset: H'00>
R
0
R
<Address: H'0080 01E5>
<After reset: H'00>
R
0
R
32180 Group User's Manual (Rev.1.0)
W
0
W
W
0
W

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