Acceptance Mask Registers - Renesas M16C/60 Series Hardware Manual

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M16C/6N5 Group

Acceptance Mask Registers

Figures 1.19.4 and 1.19.5 show the C0GMR register, the C0LMAR register, and the C0LMBR register, in
which bit mapping in byte access and word access are shown.
Bit 7
EID EID
13
EID EID
13
EID EID
13
Figure 1.19.4 Bit Mapping of Mask Registers in Byte Access
Bit 15
SID
10
EID EID
5 4
SID
10
EID EID
5 4
SID
10
EID EID
5 4
Figure 1.19.5 Bit Mapping of Mask Registers in Word Access
Rev.1.00 2003.05.30 page 206
SID SID
10 9
SID SID SID
5 4 3
EID
17
EID EID EID
12 11 10 9
EID EID EID
5 4 3
SID SID
10 9
SID SID SID
5 4 3
EID
17
EID EID EID
12 11 10 9
EID EID EID
5 4 3
SID SID
10 9
SID SID SID
5 4 3
EID
17
EID EID EID
12 11 10 9
EID EID EID
5 4 3
Bit 8 Bit 7
SID SID SID SID
9 8 7 6
EID EID EID EID EID EID
17 16 15 14 13
EID EID EID EID
3 2 1 0
SID SID SID SID
9 8 7 6
EID EID EID EID EID EID
17 16 15 14 13
EID EID EID EID
3 2 1 0
SID SID SID SID
9 8 7 6
EID EID EID EID EID EID
17 16 15 14 13
EID EID EID EID
3 2 1 0
Addresses
Bit 0
SID SID SID
8 7 6
SID SID SID
2 1 0
EID EID EID
16 15 14
EID EID EID
8 7 6
EID EID EID
2 1 0
SID SID SID
8 7 6
SID SID SID
2 1 0
EID EID EID
16 15 14
EID EID EID
8 7 6
EID EID EID
2 1 0
SID SID SID
8 7 6
SID SID SID
2 1 0
EID EID EID
16 15 14
EID EID EID
8 7 6
EID EID EID
2 1 0
SID SID SID SID SID
5 4 3 2 1
EID EID EID EID EID
12 11 10 9 8 7
SID SID SID SID SID
5 4 3 2 1
EID EID EID EID EID
12 11 10 9 8 7
SID SID SID SID SID
5 4 3 2 1
EID EID EID EID EID
12 11 10 9 8 7
CAN Module
CAN0
0160
16
0161
16
0162
16 C0GMR register
0163
16
0164
16
0166
16
0167
16
0168 C0LMAR register
16
0169
16
016A
16
016C
16
016D
16
016E
C0LMBR register
16
016F
16
0170
16
Addresses
Bit 0 CAN0
0160
SID
16
0
0162
EID C0GMR register
6 16
0164
16
SID 0166
0 16
EID
0168 C0LMAR register
6
16
016A
16
SID
0 016C
16
EID
6 016E C0LMBR register
16
0170
16