Example Of Uart Receive Operation - Renesas M32R/ECU Series User Manual

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12.7.4 Example of UART Receive Operation

The following shows a typical receive operation in UART mode.
<UART on receive side>
Receive enable bit
(SIO Receive Control Register)
RXD
Receive status bit
Reception finished bit
SIO receive interrupt
request (Note 1)
(When reception finished
interrupt is selected)
(When receive error
interrupt is selected)
Note 1: Changes of the Interrupt Controller's SIO Receive Interrupt Control Register interrupt request bit
Note 2: When reception finished interrupt is enabled (DMA transfer can also be requested at the same time)
Note 3: The Interrupt Controller's IVECT register is read or the SIO Receive Interrupt Control Register interrupt
request bit cleared
Figure 12.7.3 Example of UART Reception (When Received Normally)
<UART on receive side>
RXD
Internal clock selected
Set
ST
: Processing by software
12.7 Receive Operation in UART Mode
<UART on transmit side>
TXD
b7 b6 b0 PAR
Reception finished
interrupt request
(Note 2)
No interrupt request
: Interrupt request generated
12-52
SERIAL I/O
Cleared
SP SP
Automatically cleared for
each receive operation
performed
Read from the
receive buffer
Interrupt request accepted (Note 3)
32180 Group User's Manual (Rev.1.0)