4
[1] Saving the SM, IE and C bits
←
BSM
←
BIE
←
BC
[2] Updating the SM, IE and C bits
←
SM
←
IE
←
C
[A] Restoring the SM, IE and C bits from the
backup field
←
SM
←
IE
←
C
The values stored in the BSM, BIE
and BC bits after executing the RTE
instruction are undefined.
When EIT is accepted
When RTE instruction
is executed
0(MSB)
PSW
0
0
Figure 4.6.1 Saving and Restoring the PC and PSW
SM
IE
C
Unchanged or 0
0
0
BSM
BIE
BC
PSW
[1]
[2]
[A]
7
8
0
0
0
0
0
0
0
0
0
0
4.6 Saving and Restoring the PC and PSW
[3] Saving the PC
←
BPC
[4] Setting the vector address in the PC
←
PC
[B] Restoring the PC from the BPC register
The value stored in the BPC register
after executing the RTE instruction is
undefined.
BPC
BPSW field
15
16 17
0
0
0
0
0
0
0
0
BSM
BIE
BC
4-9
PC
Vector address
PC
[3]
[4]
[B]
PSW field
23 24 25
31(LSB)
0
0
0
0
0
0
SM
IE
C
32180 Group User's Manual (Rev.1.0)
EIT