Renesas M32R/ECU Series User Manual page 449

11
10-bit readout
AD0DT0
AD0DT1
AD0DT2
AD0DT3
AD0DT4
AD0DT5
AD0DT6
AD0DT7
AD0DT8
AD0DT9
AD0DT10
AD0DT11
AD0DT12
AD0DT13
AD0DT14
AD0DT15
AD0CMP
AVCC0
AVSS0
VREF0
AD0IN0
AD0IN1
AD0IN2
AD0IN3
AD0IN4
AD0IN5
AD0IN6
AD0IN7
AD0IN8
AD0IN9
AD0IN10
AD0IN11
AD0IN12
AD0IN13
AD0IN14
AD0IN15
Figure 11.1.1 Block Diagram of the A-D0 Converter
Internal data bus
8-bit readout
Shifter
10-bit A-D0 Data Register 0
10-bit A-D0 Data Register 1
10-bit A-D0 Data Register 2
10-bit A-D0 Data Register 3
10-bit A-D0 Data Register 4
10-bit A-D0 Data Register 5
10-bit A-D0 Data Register 6
10-bit A-D0 Data Register 7
10-bit A-D0 Data Register 8
10-bit A-D0 Data Register 9
10-bit A-D0 Data Register 10
10-bit A-D0 Data Register 11
10-bit A-D0 Data Register 12
10-bit A-D0 Data Register 13
10-bit A-D0 Data Register 14
10-bit A-D0 Data Register 15
A-D Comparate
Data Register
10-bit A-D Successive
Approximation Register
(AD0SAR)
10-bit D-A Converter
Sample-and-Hold
Control Circuit
Selector
Successive Approximation-type
A-D Converter Unit
11.1 Outline of A-D Converters
AD0SIM0, 1
A-D0 Single Mode Register
AD0SCM0, 1 A-D0 Scan Mode Register
AD0CTRG1
Input event bus 3
Input event bus 2
S
Output event bus 3
TIN23S
S
AD0STRG1
A-D Control Circuit
• Mode selection
• Channel selection
• Conversion time
selection
• Flag control
• Interrupt control
Comparator
11-4
A-D Converters
Interrupt request
DMA transfer request
DMA0
DMA common
32180 Group User's Manual (Rev.1.0)