Renesas M32R/ECU Series User Manual page 762

21
(4) TINi (i=0–33)
Symbol
tw(TINi) TINi Input Pulse Width
(5) Read and write timing
Symbol
tsu(D-BCLKH) Data Input Setup Time before BCLK
th(BCLKH-D) Data Input Hold Time after BCLK
tsu(WAITL-BCLKH) WAIT# Input Setup Time before BCLK
th(BCLKH-WAITL) WAIT# Input Hold Time after BCLK
tsu(WAITH-BCLKH) WAIT# Input Setup Time before BCLK
th(BCLKH-WAITH) WAIT# Input Hold Time after BCLK
tw(RDL) Read Low Pulse Width
tsu(D-RDH) Data Input Setup Time before Read
th(RDH-D) Data Input Hold Time after Read
tw(BLWL) Write Low Pulse Width
tw(BHWL) (byte write mode)
td(RDH-BLWL) Write Delay Time after Read
td(RDH-BHWL)
td(BLWH-RDL) Read Delay Time after Write
td(BHWH-RDL)
tw(WRL) Write Low Pulse Width
(byte enable mode)
td(RDH-WRL) Write Delay Time after Read
(byte enable mode)
td(WRH-RDL) Read Delay Time after Write
(byte enable mode)
tv(BCLKH-BLWL) Write Valid Time after BCLK
tv(BCLKH-BHWL) (with zero wait state)
td(BCLKH-RDL) Read Delay Time after BCLK
(when SWAIT = 1)
21.7 A.C. Characteristics (when VCCE = 5 V)
Parameter
Parameter
(
With zero wait state
tc(BCLK)
With 1 or more wait states
tc(BCLK)
(
tc(BCLK)
With zero wait state
tc(BCLK)
With 1 or more wait states
tc(BCLK)
With zero wait state
tc(BCLK)
With 1 or more wait states
tc(BCLK)
(
tc(BCLK)
With zero wait state
tc(BCLK)
With 1 or more wait states
tc(BCLK)
21-21
ELECTRICAL CHARACTERISTICS
Rated Value
MIN
tc(BCLK)
×
7
2
Rated Value
MIN
26
0
26
0
26
0
tc(BCLK)
) × (1+2W-S)-20
2
30
0
-8
2
) × (2W-S)-20
2
1
×
( +R+ID)-10
2
-10
2
×
(1+R)-10
-6
2
) × (2W-S)-20
2
1
×
( +R+ID)-10
2
-20
2
×
(1+R)-20
-5
32180 Group User's Manual (Rev.1.0)
Unit See Fig.
MAX 21.7.5
ns [14]
Unit See Figs.
21.7.6
21.7.7
21.7.8
MAX
21.7.9
21.7.10
ns [31]
ns [32]
ns [33]
ns [34]
ns [78]
ns [79]
ns [43]
ns [44]
ns [45]
ns [51]
ns [56]
ns [57]
ns [68]
ns [80]
ns [81]
ns [90]
12 ns [92]