Renesas M32R/ECU Series User Manual page 693

Mitsubishi 32-bit risc single-chip microcomputers
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16
(2) When the Bus Mode Control Register = 1
External read/write operations are performed using the address bus, data bus and the signals CS0#–CS3#,
RD#, BHE#, BLE#, WAIT# and WR#.
Bus Mode Control Register (Note 1)
BUSMOD bit = 1 (byte enable separated)
Note 1: For details about the Bus Mode Control Register, see Section 15.2.3, "Bus Mode Control Register."
Notes: • Hi-Z denotes a high-impedance state.
• BCLK is not output.
Figure 16.3.11 Internal Bus Access during Bus Free State
Internal bus access
BCLK
A11–A30
CS0#–CS3#
RD#
WR#
BHE#, BLE#
DB0–DB15
WAIT#
16-16
16.3 Typical Operation of the Wait Controller
Bus free state
"H"
"H"
"H"
Hi-z
(Don't Care)
WAIT CONTROLLER
32180 Group User's Manual (Rev.1.0)

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