A-D Single Mode Registers - Renesas M32R/ECU Series User Manual

11

11.2.1 A-D Single Mode Registers 0

A-D0 Single Mode Register 0 (AD0SIM0)
A-D1 Single Mode Register 0 (AD1SIM0)
b0 1 2
ADSTRG1 ADSTRG0
0 0 0
b Bit Name
0
ADSTRG1 (Note 1)
A-D hardware trigger select 1 bit
1 No function assigned. Fix to "0".
2 ADSTRG0 (Note 1)
A-D hardware trigger select 0 bit
3 ADSSEL
A-D conversion start trigger select bit
4 ADSREQ
Interrupt/DMA transfer request select bit
5 ADSCMP
A-D conversion/comparate completed bit
6 ADSSTP
A-D conversion stop bit
7 ADSSTT
A-D conversion start bit
Note 1: Two bits—A-D hardware trigger select 1 (bit 0) and A-D hardware trigger select 0 (bit 2)—are used to select an A-D
hardware trigger.
Note 2: During comparator mode, hardware triggers, if any selected, are ignored and operation is started by a software trigger.
A-D Single Mode Registers 0 are used to control operation of the A-D Converters during single mode (including
"Forcible single mode execution during scan mode").
(1) ADSTRG (A-D Hardware Trigger Select) bits (Bits 0 and 2)
These bits select a hardware trigger when A-D conversion by the A-D Converter is to be started in hardware.
Select one from the following hardware trigger sources:
A-D0 Converter: Input event bus 2
The contents of these bits are ignored if a software trigger is selected by ADSSEL (A-D conversion start
trigger select bit).
3 4 5 6
ADSSEL ADSREQ ADSCMP ADSSTP
0 0 1 0
Input event bus 3
Output event bus 3
TIN23 edge select output
11.2 A-D Converter Related Registers
b7
ADSSTT
0
Function
Bits 0 and 2 are used to select an A-D hardware trigger.
b0 b2 A-D0 Converter
0 0 : Input event bus 2
0 1 : Input event bus 3
1 0 : Output event bus 3
1 1 : TIN23S signal
Bits 0 and 2 are used to select an A-D hardware trigger.
(See the column for bit 0.)
0: Software trigger
1: Hardware trigger (Note 2)
0: A-D conversion interrupt request
1: DMA transfer request
0: A-D conversion/comparate in progress
1: A-D conversion/comparate completed
0: No operation
1: Stop A-D conversion
0: No operation
1:Start A-D conversion
A-D1 Converter: Input event bus 2
11-16
A-D Converters
<Address: H'0080 0080>
<Address: H'0080 0A80>
<After reset: H'04>
R
R
A-D1 Converter
Input event bus 2
Input event bus 3
TID1_udf/ovf
TIN23S signal
0
R
R
R
R
0
0
Input event bus 3
TID1 underflow/overflow
TIN23 edge select output
32180 Group User's Manual (Rev.1.0)
W
W
0
W
W
W
–
W
W