Renesas M32R/ECU Series User Manual page 715

18
(1) XSTAT (XIN oscillation status) bit (Bit 11)
1) Conditions under which XSTAT is set to "1"
XSTAT is set to "1" upon detecting that XIN oscillation has stopped. When XIN remains at the same level for
a predetermined time (3 BCLK periods up to 4 BCLK periods), XIN oscillation is assumed to have stopped.
When operating normally, XIN changes state (high or low) once every BCLK period.
2) Conditions under which XSTAT is cleared to "0"
XSTAT is cleared to "0" by a system reset or by writing "0". If XSTAT is cleared at the same time it is set in
1) above, the former has priority so that XSTAT is cleared. Writing "1" to XSTAT is ignored.
3) Method for using XSTAT to detect XIN oscillation stoppage
Because the M32R/ECU internally contains a PLL, the internal clock remains active even when XIN oscillation
has stopped.
By reading XSTAT without clearing it never once after reset, it is possible to know whether XIN has ever
stopped since the reset signal was deasserted. Similarly, by reading XSTAT after clearing it by writing 0, it is
possible to know the current oscillating status of XIN. (However, there must be an interval of at least 5 BCLK
periods (20 CPU clock periods) between read and write.)
(1) To know whether XIN oscillation has ever stopped after being reset
(2) To know the current status of XIN oscillation
Figure 18.1.3 Procedure for Setting XSTAT
Read XSTAT
Write XSTAT = 0
Wait before inspecting XSTAT
Wait for 20 CPU
clock periods or more
Read XSTAT
18-4
OSCILLATOR CIRCUIT
18.1 Oscillator Circuit
32180 Group User's Manual (Rev.1.0)