Renesas M32R/ECU Series User Manual page 766

Mitsubishi 32-bit risc single-chip microcomputers
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21
(4) Read and write timing
Symbol
tc(BCLK)
BCLK Output Cycle Time
tw(BCLKH)
BCLK Output High Pulse Width
tw(BCLKL)
BCLK Output Low Pulse Width
td(BCLKH-A)
Address Delay Time after BCLK
td(BCLKH-CS)
Chip Select Delay Time after BCLK
tv(BCLKH-A)
Address Valid Time after BCLK
tv(BCLKH-CS)
Chip Select Valid Time after BCLK
td(BCLKL-RDL)
Read Delay Time after BCLK
tv(BCLKH-RDL)
Read Valid Time after BCLK
td(BCLKL-BLWL) Write Delay Time after BCLK
td(BCLKL-BHWL)
tv(BCLKL-BLWL) Write Valid Time after BCLK
tv(BCLKL-BHWL)
td(BCLKL-D)
Data Output Delay Time after BCLK
tv(BCLKH-D)
Data Output Valid Time after BCLK
tpzx(BCLKL-DZ) Data Output Enable Time after BCLK
tpxz(BCLKH-DZ) Data Output Disable Time after BCLK
td(A-RDL)
Address Delay Time before Read
td(CS-RDL)
Chip Select Delay Time before Read
tv(RDH-A)
Address Valid Time after Read
tv(RDH-CS)
Chip Select Valid Time after Read
tpzx(RDH-DZ)
Data Output Enable Time after Read
td(A-BLWL)
Address Delay Time before Write
td(A-BHWL)
(byte write mode)
td(CS-BLWL)
Chip Select Delay Time before Write
td(CS-BHWL)
(byte write mode)
tv(BLWH-A)
Address Valid Time after Write
tv(BHWH-A)
(byte write mode)
tv(BLWH-CS)
Chip Select Valid Time after Write
tv(BHWH-CS)
(byte write mode)
Parameter
With 1 or more wait states: -10
With 1 or more wait states:
With 1 or more wait states:
21-25
ELECTRICAL CHARACTERISTICS
21.7 A.C. Characteristics (when VCCE = 5 V)
Rated Value
MIN
tc(BCLK)
-5
2
tc(BCLK)
-5
2
-5
-5
-5
-5
With 1 or more wait states: 18
With zero wait state: -4
-10
tc(BCLK)
(
)×(1+S)-15
2
tc(BCLK)
(
)×(1+S)-15
2
tc(BCLK)×(R+ID)
tc(BCLK)×R
1
tc(BCLK)×( +R+ID)
2
tc(BCLK)
(
)×(1+S)-15
2
tc(BCLK)
(
)×(1+S)-15
2
With zero wait state: -5
1
tc(BCLK)×( +R)-5
2
With zero wait state: -5
1
tc(BCLK)×( +R)-5
2
Unit
MAX
tc(Xin)
ns
2
ns
ns
24
ns
24
ns
ns
ns
10
ns
ns
11
ns
ns
ns
With zero wait state: 11
ns
ns
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
32180 Group User's Manual (Rev.1.0)
See Figs.
21.7.6
21.7.7
21.7.8
21.7.9
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