Renesas M32R/ECU Series User Manual page 483

11
(3) Calculating the conversion time during comparator mode
The following schematically shows the method for calculating the conversion time during comparator mode.
A-D conversion
Figure 11.3.5 Conceptual Diagram of A-D Conversion Time during Comparator Mode
Table 11.3.4 Conversion Clock Periods during Comparator Mode
Conversion speed
Slow mode Normal speed
Double speed
Fast mode Normal speed
Double speed
(4) A-D conversion time
A total A-D conversion time in various modes are shown in the table below.
Table 11.3.5 A-D Conversion Time (Total Time)
Conversion start method
Software and
hardware triggers
(Note 2)
Slow
Mode
Fast
Mode
Note 1: For single mode and comparator mode, this indicates an A-D conversion or comparate time per channel. For single-
shot and continuous scan modes, this indicates an A-D conversion time per scan loop.
Note 2: This indicates a time from when a register write cycle has finished to when an A-D conversion completion interrupt
request is generated, or a time from when an event bus or other MJT event has occurred to when an A-D conversion
completion interrupt request is generated.
Convert operation
starts
start trigger
Start dummy
Start dummy
4
4
4
4
Conversion speed Conversion mode (Note 1)
Normal speed Single mode
n-channel single-shot scan/
continuous scan mode
Comparator mode
Double speed Single mode
n-channel single-shot scan/
continuous scan mode
Comparator mode
Normal speed Single mode
n-channel single-shot scan/
continuous scan mode
Comparator mode
Double speed Single mode
n-channel single-shot scan/
continuous scan mode
Comparator mode
11.3 Functional Description of A-D Converters
Transferred to the
comparate data register
Execution cycle End dummy
Execution cycle
42
24
18
12
11-38
A-D Converters
Completed
Unit: BCLK
End dummy
1
1
1
1
Unit: BCLK
Conversion time When fast sample-
and-hold enabled
299
(298 × n)+1 (190 × n)+1
47
173
(172 × n)+1 (100 × n)+1
29
131
(130 × n)+1
23
89
(88 × n)+1
17
32180 Group User's Manual (Rev.1.0)
191
47
101
29
95
(94 × n)+1
23
53
(52 × n)+1
17