12
Serial I/O
related registers
Note 1: If clock divider divide-by ratio = 1 is selected, it is necessary that the value set in the baud rate
register be equal to or greater than 7.
Figure 12.7.1 Procedure for Initializing UART Reception
Initialize UART reception
Set SIO Transmit/Receive Mode Register
Set SIO Transmit Control Register
Set SIO Baud Rate Register
Set SIO interrupt related registers
Set Interrupt Controller's
SIO Receive Interrupt Control Register
Set DMAC related registers
Set Input/Output Port
Operation Mode Register
End of UART receive initialization
12.7 Receive Operation in UART Mode
•
Set the register to UART mode
•
Set parity (when enabled, select odd/even)
•
Set the stop bit length
•
Set the character length
•
Select the clock divider divide-by ratio
•
Divide-by ratio = H'00 to H'FF (Note 1)
•
Select the source of receive interrupt request
•
Enable or disable receive interrupt requests
(When using interrupts)
(When using the DMAC)
12-49
SERIAL I/O
32180 Group User's Manual (Rev.1.0)