Renesas M32R/ECU Series User Manual page 62

Mitsubishi 32-bit risc single-chip microcomputers
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3
SFR Area Register Map (4/27)
Address
b0
H'0080 0204
|
H'0080 0210
H'0080 0212
H'0080 0214
H'0080 0216
H'0080 0218
H'0080 021A
|
H'0080 0220
H'0080 0222
H'0080 0224
H'0080 0226
H'0080 0228
H'0080 022A
|
H'0080 0230
TOP0–5 Interrupt Request Status Register
H'0080 0232
TOP6, 7 Interrupt Request Mask & Status Register
H'0080 0234
TIO0–3 Interrupt Request Mask & Status Register
H'0080 0236
TIO8, 9 Interrupt Request Mask & Status Register
H'0080 0238
TIN0–2 Interrupt Request Mask & Status Register
H'0080 023A
TIN7–11 Interrupt Request Status Register
H'0080 023C
TIN12–19 Interrupt Request Status Register
H'0080 023E
TIN20–23 Interrupt Request Mask & Status Register
H'0080 0240
H'0080 0242
H'0080 0244
H'0080 0246
|
H'0080 0250
H'0080 0252
H'0080 0254
H'0080 0256
|
+0 address
Prescaler Register 2
(PRS2)
(Use inhibited area)
TCLK Input Processing Control Register
TIN0–4 Input Processing Control Register
TIN5–8 Input Processing Control Register
TIN9–11 Input Processing Control Register
TIN12–19 Input Processing Control Register
TIN20–23, TIN30–33 Input Processing Control Register
(TIN2023_3033CR)
(Use inhibited area)
F/F6–15 Source Select Register
(Use inhibited area)
F/F0–15 Protect Register
F/F0–15 Data Register
(Use inhibited area)
(Use inhibited area)
(Use inhibited area)
(TOP05IST)
(TOP67IMS)
(TIO03IMS)
(TIO89IMS)
(TIN02IMS)
(TIN711IST)
(TIN1219IST)
(TIN2023IMS)
TOP0 Reload Register
(Use inhibited area)
TOP0 Correction Register
(Use inhibited area)
TOP1 Reload Register
(Use inhibited area)
TOP1 Correction Register
(Use inhibited area)
3.4 Internal RAM and SFR Areas
+1 address
b7 b8
Output Event Bus Control Register
(TCLKCR)
(TIN04CR)
(TIN58CR)
(TIN911CR)
(TIN1219CR)
(FF615S)
F/F16–19 Source Select Register
(FF015P)
(FF015D)
F/F16–20 Protect Register
F/F16–20 Data Register
TOP0–5 Interrupt Request Mask Register
(TOP05IMA)
TOP8, 9 Interrupt Request Mask & Status Register
(TOP89IMS)
TIO4–7 Interrupt Request Mask & Status Register
(TIO47IMS)
TMS0, 1 Interrupt Request Mask & Status Register
(TMS01IMS)
TIN3–6 Interrupt Request Mask & Status Register
(TIN36IMS)
TIN7–11 Interrupt Request Mask Register
(TIN711IMA)
TIN12–19 Interrupt Request Mask Register
(TIN1219IMA)
TIN30–33 Interrupt Request Mask & Status Register
(TIN3033IMS)
TOP0 Counter
(TOP0CT)
(TOP0RL)
(TOP0CC)
TOP1 Counter
(TOP1CT)
(TOP1RL)
(TOP1CC)
3-11
ADDRESS SPACE
b15
(OEBCR)
(FF1619S)
(FF1620P)
(FF1620D)
32180 Group User's Manual (Rev.1.0)
See pages
10-12
10-17
10-20
10-21
10-22
10-23
10-24
10-24
10-28
10-29
10-30
10-32
10-30
10-32
10-39
10-41
10-42
10-43
10-44
10-45
10-46
10-47
10-48
10-49
10-51
10-53
10-57
10-75
10-76
10-77
10-75
10-76
10-77

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