Inspecting And Setting Data Registers - Renesas M32R/ECU Series User Manual

19

19.4.4 Inspecting and Setting Data Registers

To inspect or set the data register, follow the procedure described below.
(1) To access the test access port (JTAG) for the first time, apply a test reset (to initialize the test circuit). One
of the following two methods may be used to apply a test reset:
• Pull the JTRST# pin low.
• Drive the JTMS pin high to apply 5 or more JTCK cycles
(2) Apply JTMS = low to enter the Run-Test/Idle state. To continue the idle state, hold JTMS input low.
(3) Apply JTMS = high to exit the Run-Test/Idle state and perform IR path sequence. In the IR path sequence,
specify the data register to inspect or set.
(4) Proceed to perform DR path sequence. Feed setup data from the JTDI pin into the data register specified
in the IR path sequence, and read out reference data from the JTDO pin.
(5) To proceed to perform IR path or DR path sequence after the DR path sequence is completed, apply
JTMS = high to return to the Select-DR-Scan state.
To wait for the next processing after a series of IR and DR sequence processing is completed, apply JTMS
= low to enter the Run-Test/Idle state and keep that state.
TAP states
JTDI
(Note 1)
JTDO
(Note 2)
TAP states
JTDI
(Note 1)
JTDO
(Note 2)
Note 1: The setup value for each register must be supplied LSB-first from the JTDI pin.
Note 2: The value in each register is output from the JTDO pin beginning with the LSB. It is only in the Shift-IR state of IR path
sequence and the Shift-DR state of DR path sequence that valid data is output from the JTDO pin. In all other states,
the JTDO pin goes to a high-impedance state.
Note 3: This shows readout from the data register selected by the instruction that was set in the immediately preceding IR path
sequence. The value sampled during Capture-DR state is output at the shift register stage of the selected data register.
Figure 19.4.5 Successive JTAG Access
Test-Logic- Run-Test IR path
Reset state sequence
/Idle state
Instruction
code
#0
Fixed value
b'110001
Specify the data register
to inspect or set.
(1) Basic access
Test-Logic- Run-Test IR path
Reset state sequence
/Idle state
Instruction
code
#0
Fixed value
b'110001
Specify the data register
to inspect or set.
(2) Successive accesses to the same data register
19.4 Basic Operation of JTAG
DR path Run-Test IR path
sequence /Idle state sequence
Instruction
Setup data
code
#0
#1
Fixed value
(Note 3)
b'110001
Setup data is serially fed from JTDI.
Reference data is serially output from JTDO.
DR path
DR path Run-Test
sequence /Idle state sequence
Setup data Setup data
#0 #1
(Note 3) (Note 3)
The same data register can be successively
operated on to set or inspect.
19-10
DR path
sequence
Setup data
#1
(Note 3)
DR path
sequence
Setup data
#2
(Note 3)
32180 Group User's Manual (Rev.1.0)
JTAG