Renesas M32R/ECU Series User Manual page 791

21
BCLK
[35]
tsu(HREQL-BCLKH)
HREQ#
0.16VCC-BUS
HACK#
Figure 21.8.11 Bus Arbitration Timing
JTCK, JTDI
JTMS, JTRST
Note: • The rated values here are guaranteed for the case where the measured pin load capacitance CL = 80 pF.
Figure 21.8.12 Input Transition Time of JTAG Pins
0.43VCC-BUS
0.16VCC-BUS
[36]
th(BCLKH-HREQL)
[37]
td(BCLKL-HACKL)
[58]
tr
0.8VCCE
0.2VCCE
ELECTRICAL CHARACTERISTICS
21.8 A.C. Characteristics (when VCCE = 3.3 V)
0.16VCC-BUS
0.16VCC-BUS
[59]
tf
0.8VCCE
0.2VCCE
21-50
[38]
tv(BCLKL-HACKL)
0.16VCC-BUS
32180 Group User's Manual (Rev.1.0)