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10
TOP6,7 Control Register (TOP67CR)
b0
1
2
TOP7
TOP7M
ENS
0
0
0
b
Bit Name
0
No function assigned. Fix to "0".
1
TOP7ENS
TOP7 enable source select bit
2, 3
TOP7M
TOP7 operation mode select bit
4, 5
No function assigned. Fix to "0".
6, 7
TOP6M
TOP6 operation mode select bit
8
No function assigned. Fix to "0".
9–11
TOP67ENS
TOP6, TOP7 enable source select bit
12, 13
No function assigned. Fix to "0".
14, 15
TOP67CKS
TOP6, TOP7 clock source select bit
Notes: • This register must always be accessed in halfwords.
• Operation mode can only be set or changed while the counter is inactive.
TIN1 (P151)
Figure 10.3.4 Outline Diagram of TOP6, TOP7 Clock and Enable Inputs
3
4
5
6
TOP6M
0
0
0
0
Clock bus
Input event bus
3 2 1 0
3 2 1 0
S
TIN1S
S
S : Selector
Note: • This diagram only illustrates TOP control registers and is partly omitted.
MULTIJUNCTION TIMERS
10.3 TOP (Output-Related 16-Bit Timer)
7
8
9
10
TOP67ENS
0
0
0
0
Function
0: Result selected by TOP67ENS bit
1: TOP6 output
00: Single-shot output mode
01: Delayed single-shot output mode
10: Continuous output mode
11: – ditto –
00: Single-shot output mode
01: Delayed single-shot output mode
10: Continuous output mode
11: – ditto –
000: External TIN1 input
001: – ditto –
010: – ditto –
011: – ditto –
100: Input event bus 0
101: Input event bus 1
110: Input event bus 2
111: Input event bus 3
00: Clock bus 0
01: Clock bus 1
10: Clock bus 2
11: Clock bus 3
clk
TOP 6
en
clk
TOP 7
en
S
10-73
<Address: H'0080 02AA>
11
12
13
14
TOP67CKS
0
0
0
0
<After reset: H'0000>
udf
udf
32180 Group User's Manual (Rev.1.0)
b15
0
R
W
0
0
R
W
R
W
0
0
R
W
0
0
R
W
0
0
R
W
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