Renesas M32R/ECU Series User Manual page 450

11
10-bit readout
AD1DT0
AD1DT1
AD1DT2
AD1DT3
AD1DT4
AD1DT5
AD1DT6
AD1DT7
AD1DT8
AD1DT9
AD1DT10
AD1DT11
AD1DT12
AD1DT13
AD1DT14
AD1DT15
AD1CMP
AVCC1
AVSS1
VREF1
AD1IN0
AD1IN1
AD1IN2
AD1IN3
AD1IN4
AD1IN5
AD1IN6
AD1IN7
AD1IN8
AD1IN9
AD1IN10
AD1IN11
AD1IN12
AD1IN13
AD1IN14
AD1IN15
Figure 11.1.2 Block Diagram of the A-D1 Converter
Internal data bus
8-bit readout
Shifter
10-bit A-D1 Data Register 0
10-bit A-D1 Data Register 1
10-bit A-D1 Data Register 2
10-bit A-D1 Data Register 3
10-bit A-D1 Data Register 4
10-bit A-D1 Data Register 5
10-bit A-D1 Data Register 6
10-bit A-D1 Data Register 7
10-bit A-D1 Data Register 8
10-bit A-D1 Data Register 9
10-bit A-D1 Data Register 10
10-bit A-D1 Data Register 11
10-bit A-D1 Data Register 12
10-bit A-D1 Data Register 13
10-bit A-D1 Data Register 14
10-bit A-D1 Data Register 15
A-D Comparate
Data Register
10-bit A-D Successive
Approximation Register
(AD0SAR)
10-bit D-A Converter
Sample-and-Hold
Control Circuit
Selector
Successive Approximation-type
A-D Converter Unit
11.1 Outline of A-D Converters
AD1SIM0, 1
A-D1 Single Mode Register
A-D1 Scan Mode Register
AD1SCM0, 1
AD1CTRG1
Input event bus 3
Input event bus 2
S
TID1_unf/ovf
TIN23S
S
AD1STRG1
A-D Control Circuit
• Mode selection
• Channel selection
• Conversion time
selection
• Flag control
• Interrupt control
Comparator
11-5
A-D Converters
Interrupt request
DMA transfer request
DMA3
DMA9
32180 Group User's Manual (Rev.1.0)