13
(1) SJW bits (Bits 0–1)
These bits set the reSynchronization Jump Width.
(2) PH2 bits (Bits 2–4)
These bits set the width of Phase Segment2.
(3) PH1 bits (Bits 5–7)
These bits set the width of Phase Segment1.
(4) PRB bits (Bits 8–10)
These bits set the width of Propagation Segment.
(5) SAM bit (Bit 11)
This bit sets the number of times each bit is sampled. When SAM = "0", the value sampled at the end of
Phase Segment1 is assumed to be the value of the bit. When SAM = "1", the value of the bit is determined by
a majority circuit from three sampled values, each sampled 2 Tq's before, 1 Tq before, and at the end of
Phase Segment1.
Table 13.2.1 Typical Settings of Bit Timing when CPU Clock = 80 MHz
Baud Rate
BRP Set Value
1M bps
1
3
3
3
4
4
500K bps
4
4
4
7
7
7
9
9
Table 13.2.2 Typical Settings of Bit Timing when CPU Clock = 64 MHz
Baud Rate
BRP Set Value
1M bps
1
3
3
500K bps
3
3
7
7
Tq Period (ns)
No. of Tq's in 1 Bit
50
20
100
10
100
10
100
10
125
8
125
8
125
16
125
16
125
16
200
10
200
10
200
10
250
8
250
8
Tq Period (ns)
No. of Tq's in 1 Bit
62.5
16
125
8
125
8
125
16
125
16
250
8
250
8
13-23
CAN MODULE
13.2 CAN Module Related Registers
PROP + PH1
PH2
13
6
7
2
6
3
5
4
5
2
4
3
13
2
12
3
11
4
7
2
6
3
5
4
5
2
4
3
PROP + PH1
PH2
10
5
5
2
4
3
13
2
11
4
5
2
4
3
32180 Group User's Manual (Rev.1.0)
Sampling Point
70%
80%
70%
60%
75%
63%
88%
81%
75%
80%
70%
60%
75%
63%
Sampling Point
69%
75%
63%
88%
75%
75%
63%