Renesas M32R/ECU Series User Manual page 675

15
(3) When the Bus Mode Control Register = "1" using a combination of 8/16-bit data bus memories
The diagram below shows a typical connection of external extension memory, with an 8-bit data bus memory
located in the CS0 area, and a 16-bit data bus memory located in the CS1 area. (External extension memory
can only be used in external extension mode and processor mode.)
M32180F8
A11
A30
D0
D7
D8
D15
RD#
CS0#
WR#
BHE#
BLE#
CS1#
WAIT#
CS2#
CS3#
Note: • The QS32X2245 is a product made by the IDT Company.
Figure 15.5.3 Typical Connection of External Extension Memory (when BUSMOD bit = "1" using a combina-
tion of 8/16-Bit Memories)
Note: • The address and data are connected in such a way that pin 0 is the MSB and pin 15 is the LSB.
When connecting external extension memory, connections of the MSB and LSB sides must be
reversed.
15.5 Typical Connection of External Extension Memory
When CL = 50 pF, memory can be connected with only 2 ns of data delay.
8-bit memory
A18
A1
QS32X2245
D7
A B
max1MB
D0
A B
OE
WR#
RD#
CS#
A0
SRAM
A19
A0
D15
D0
WR#(D0-D15)
RD#(D0-D15)
BHE#
BLE#
CS#
Number of bus wait states can be set to 0-7.
Normally used as port. WAIT is used only when seven or more wait states are needed.
15-20
EXTERNAL BUS INTERFACE
H'0000 0000
H'000F FFFF
H'0010 0000
External memory area
H'0020 0000
External memory area
max2MB
H'0040 0000
32180 Group User's Manual (Rev.1.0)
Memory mapping
Internal flash memory
(1024KB)
(1MB)
1M-CS0 area
8-bit bus area
(2MB)
2M-CS1 area
16-bit bus area