Clock Output Function; System Clock Protection Function - Renesas M16C/64C User Manual

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M16C/64C Group
8.5

Clock Output Function

In single-chip mode, the f1, f8, f32 or fC clock can be output from the CLKOUT pin. Use bits CM01 to
CM00 in the CM0 register, and the PCLK5 bit in the PCLKR register to select a clock. f8 has the same
frequency as f1 divided by 8, and f32 has the same frequency as f1 divided by 32.
8.6

System Clock Protection Function

The system clock protection function prohibits the CPU clock from changing clock sources when the main
clock is selected as the CPU clock source. This is to prevent the CPU clock from stopping due to an
unexpected program operation.
When the PM21 bit in the PM2 register is set to 1 (clock change disabled), the following bits remain
unchanged even if they are written to:
The CM02 bit in the CM0 register (peripheral function clock f1 in wait mode)
The CM05 bit in the CM0 register (to prevent the main clock from being stopped)
The CM07 bit in the CM0 register (clock source of the CPU clock)
The CM10 bit in the CM1 register (MCU does not enter stop mode)
The CM11 bit in the CM1 register (clock source of the CPU clock)
The CM20 bit in the CM2 register (oscillator stop/restart detect function set)
All bits in the PLC0 register (PLL frequency synthesizer set)
To use the system clock protect function, set the CM05 bit in the CM0 register to 0 (main clock oscillation)
and CM07 bit to 0 (main clock as CPU clock source), and then follow the steps below.
(1) Set the PRC1 bit in the PRCR register to 1 (write to PM2 register enabled).
(2) Set the PM21 bit in the PM2 register to 1 (clock change disabled).
(3) Set the PRC1 bit in the PRCR register to 0 (write to PM2 register disabled).
When the PM21 bit is 1, do not execute the WAIT instruction.
R01UH0092EJ0110 Rev.1.10
Jul 31, 2012
8. Clock Generator
Page 102 of 807

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