ST STM32WL55JC Reference Manual page 1347

RM0453
38.6.7 DWT fold count register (DWT_FOLDCNTR)
Address offset: 0x018
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
Res. Res. Res. Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 FOLDCNT[7:0]: folded instruction counter
Increments on each instruction that takes 0 cycles.
38.6.8 DWT program counter sample register (DWT_PCSR)
Address offset: 0x01C
Reset value: 0x0000 0000
31 30 29
r r r
15 14 13
r r r
Bits 31:0 EIASAMPLE[31:0]: executed Instruction Address sample value
Samples the current value of the program counter.
38.6.9 DWT comparator register x (DWT_COMPxR)
Address offset: 0x020 + 0x010 * x, (x = 0 to 3)
Reset value: 0x0000 0000
31 30 29
r r r
15 14 13
r r r
Bits 31:0 COMP[31:0]: reference value for comparison
27 26 25
Res. Res. Res.
11 10 9
Res. Res. Res.
28 27 26 25
r r r r
12 11 10 9
r r r r
28 27 26 25
r r r r
12 11 10 9
r r r r
24 23 22
Res. Res. Res. Res.
8 7 6
Res.
rw rw
24 23 22
EIASAMPLE[31:16]
r r r
8 7 6
EIASAMPLE[15:0]
r r r
24 23 22
COMP[31:16]
r r r
8 7 6
COMP[15:0]
r r r
RM0453 Rev 2
Debug support (DBG)
21 20 19 18
Res. Res. Res.
5 4 3 2
FOLDCNT[7:0]
rw rw rw rw
21 20 19 18
r r r r
5 4 3 2
r r r r
21 20 19 18
r r r r
5 4 3 2
r r r r
17 16
Res. Res.
1 0
rw rw
17 16
r r
1 0
r r
17 16
r r
1 0
r r
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