Tim10/11/13/14 Counter (Timx_Cnt) - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
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General-purpose timers (TIM9 to TIM14)
19.5.7

TIM10/11/13/14 counter (TIMx_CNT)

Address offset: 0x24
Reset value: 0x0000
15
14
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Bits 15:0 CNT[15:0]: Counter value
19.5.8
TIM10/11/13/14 prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
15
14
13
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency CK_CNT is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event.
19.5.9
TIM10/11/13/14 auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0x0000
15
14
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Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to
behavior.
The counter is blocked while the auto-reload value is null.
684/1731
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Section 19.3.1: Time-base unit on page 644
DocID018909 Rev 11
8
7
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CNT[15:0]
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8
7
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5
PSC[15:0]
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CK_PSC
8
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ARR[15:0]
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for more details about ARR update and
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/ (PSC[15:0] + 1).
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RM0090
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