9.3.1
Watch timer control register (WTC)
This section explains the functions of the watch timer control register (WTC).
I Watch timer control register (WTC)
7
6
R/W
R
R/W
: Read/Write
R
: Read only
X
: Undefined
SCLK
: Subclock
: Reset value
The values in "()" are the calculated example at subclock = 8.192 kHz.
Figure 9.3-2 Watch timer control register (WTC)
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
1X001000
B
bit2
bit1
bit0
WTC2
WTC1
WTC0
Interval time select bit
8
2
/SCLK (31.25ms)
0
0
0
9
2
/SCLK (62.5ms)
0
0
1
10
2
/SCLK (125ms)
0
1
0
11
2
/SCLK (250ms)
0
1
1
12
2
/SCLK (500ms)
1
0
0
13
1
0
1
2
/SCLK (1.0s)
14
1
1
0
2
/SCLK (2.0s)
15
2
/SCLK (4.0s)
1
1
1
bit3
Watch timer clear bit
WTR
Read
0
-
1
"1" is always read.
bit4
over flow flag bit
WTOF
Read
0
Without over flow of corresponding
bit within setting interval time
1
With over flow of corresponding bit
within setting interval time
bit5
Over flow interrupt enable bit
WTIE
Interrupt request disabled
0
1
Interrupt request enabled
bit6
Oscillation stabilization waiting time finish bit
SCE
Oscillation stabilization waiting state
0
Oscillation stabilization waiting time finish
1
bit7
Watchdog clock select bit
(Input clock of watchdog timer)
WDCS
Main of PLL clock mode
0
Watch timer
Time base timer
1
CHAPTER 9 Watch timer
Write
Clear watch timer counter
No effection
Write
Clear WTOF bit
No effection
Sub clock mode
Set "0".
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