Fujitsu MB90895 Series Hardware Manual page 259

I Operation Timing of Input Capture
Figure 7.6-2 shows the timing of reading the counter value of the 16-bit free-run timer.
Figure 7.6-2 Timing of Reading Counter Value of Input Capture
φ
Counter value
Input capture
input
Capture signal
Input capture
data register (IPCP)
Input capture
interrupt
φ
: Machine clock
Figure 7.6-3 shows the timing of the capture operation depending on the edge type.
Figure 7.6-3 Timing of Capture Operation Depending on Edge Type
Counter value
IN0 (rising edge)
IN1 (falling edge)
IN2 (both edge)
Input capture
data register 0 (IPCP0)
input capture
data register 1 (IPCP1)
Input capture
data register 2 (IPCP2)
Input capture 0
Interrupt
Input capture 1
Interrupt
Input capture 2
Interrupt
F F F F
H
B F F F
H
7 F F F
H
3 F F F
H
0 0 0 0
H
Reset
Undefined
Undefined
Undefined
N
Available edge
Capturing counter value
3FFF
H
BFFF
H
CHAPTER 7 16-bit I/O timer
N+1
N+1
Time
7FFF
H
3FFF
H
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