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CHAPTER 6 Watchdog timer
6.1
Overview of Watchdog Timer
The watchdog timer is a 2-bit counter that uses the timebase timer or watch timer as a
count clock.If the counter is not cleared within a set interval time, the CPU is reset.
I Functions of Watchdog Timer
• The watchdog timer is a timer counter that is used to prevent program malfunction.When the watchdog
timer is started, the watchdog timer counter must continue to be cleared within a set interval time.If the
set time interval is reached without clearing the watchdog timer counter, the CPU is reset. This is called
watchdog timer
• The interval time of the watchdog timer depends on the clock cycle input as a count clock and a
watchdog reset occurs between the minimum and maximum times.
• The clock source output destination is set by the watchdog clock select bit in the watch timer control
register (WTC: WDCS).
• The interval time of the watchdog timer is set by the timebase timer output select bit/watch timer output
select bit in the watchdog timer control register (WDTC: WT1, WT0).
Table 6.1-1 lists the interval times of the watchdog timer.
Table 6.1-1 Interval Time of Watchdog Timer
Min.
Approx. 3.58
ms
Approx.
14.33 ms
Approx.
57.23 ms
Approx.
458.75 ms
HCLK: Oscillation clock (4 MHz), SLCK: Sub clock (8.192 kHz)
Notes:
• When the timebase timer output (carry signal) is used as a count clock to the watchdog
timer, clearing the timebase timer may extend the time for a watchdog reset to occur.
• When the subclock is used as the machine cock, be sure to set the watchdog timer clock
source select bit (WDCS) in the watch timer control register (WTC) to "0" to select the
watch timer output.
208
Max.
Clock Cycle
14
±
11
Approx. 4.61
2
2
ms
/HCLK
±
16
13
Approx. 18.3
2
2
ms
/HCLK
18
±
15
Approx.
2
2
73.73 ms
/HCLK
±
21
18
Approx.
2
2
589.82 ms
/HCLK
Min.
Max.
Approx.
Approx.
0.457 s
0.576 s
Approx.
Approx.
3.584 s
4.608 s
Approx.
Approx.
7.168 s
9.216 s
Approx.
Approx.
14.336 s
18.432 s
Clock Cycle
12
±
9
2
2
/SCLK
±
15
12
2
2
/SCLK
16
±
13
2
2
/SCLK
±
17
14
2
2
/SCLK
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