Control Status Register (Low) (Csr: L) - Fujitsu MB90895 Series Hardware Manual

CHAPTER 16 CAN controller
16.3.2

Control Status Register (Low) (CSR: L)

The control status register (CSR) controls operation of the CAN controller.The control
status register (Low) (CSR: L) enables and disables transmit interrupt and node status
transition interrupt and, controls bus halt and indicates the node status.
I Control Status Register (Low) (CSR: L)
7 6
5
R/W - -
R/W : Read/Write
W : Write only
X : Undefined
- : Unused
:Reset value
Note: It is prohibited to execute a bit operation (read-modify-write) instruction on the lower 8 bits
of control status register (CSR).
Only in the case of HALT bits unchanged, use any bits operation instructions without
problems (initialization of the macro instructions e.t.c).
488
Figure 16.3-5 Control Status Register (Low) (CSR: L)
0
4 3 2 1
- - R/W W R/W
bit0
Reserved
bit2
bit7
Reset value
0 X X X X 0 0 1
B
HALT
at reading
0
On bus operation
Halting bus
1
bit1
Reserved bit
0
Be sure to set this bit to 0.
NIE Node status transition interrupt output enable bit
0 Node status transition interrupt is prohibited
1 Node status transition interrupt is enabled
TOE Transmit output enable bit
0 Can be used as general-purpose I/O ports.
1 Can be used as transmit pin (TX)
Bus halt bit
at writing
Canceling bus halt
Set bus halting