Explanation Of Operation Of 8-/16-Bit Ppg Timer - Fujitsu MB90895 Series Hardware Manual

CHAPTER 10 8/16-bit PPG timer
10.5

Explanation of Operation of 8-/16-bit PPG Timer

The 8-/16-bit PPG timer outputs a pulse width at any cycle and at any duty ratio
continuously.
I Operation of 8-/16-bit PPG Timer
G
Output operation of 8-/16-bit PPG timer
• The 8-/16-bit PPG timer has two (Low-level and High-level) 8-bit reload registers (PRLL0/PRLH0 and
PRLL1/PRLH1) for each channel.
• The values set in the 8-bit reload registers (PRLL0/PRLH0 and PRLL1/PRLH1) are reloaded alternately
to the PPG down counters (PCNT0 and PCNT1).
• After reloading the values in the PPG down counters, decrementing is performed in synchronization
with the count clocks set by the PPG count clock select bits (PPG01: PCM2 to PCM0 and PCS1 and
PCS0).
• If the values set in the reload registers are reloaded to the PPG down counters when an underflow
occurs, the pin output is inverted.
Figure 10.5-1 shows the output waveform of the 8-/16-bit PPG timer.
PPG operating enable bit
(PEN)
PPG output pin
L : Value of PPG reload register (PRLL)
H : Value of PPG reload register (PRLH)
T : Count clock cycle
G
Operation Modes of 8-/16-bit PPG Timer
As long as the operation of the 8-/16-bit PPG timer is enabled (PPGC0: PEN0 = 1, PPGC1: PEN1 = 1), a
pulse waveform is output continuously from the PPG output pin.A pulse width of any cycle and duty ratio
can be set.
The pulse output of the 8-/16-bit PPG timer is not stopped until operation of the 8-/16-bit PPG timer is
stopped (PPGC0: PEN0 = 0, PPGC1: PEN1 = 0).
• 8-bit PPG output 2-channel independent operation mode
• 16-bit PPG output mode
• 8 + 8-bit PPG output mode
310
Figure 10.5-1 Output Waveform of 8-/16-bit PPG Timer
Operating start
T × (L+1)
Operating stop
T × (H+1)