Block Diagram Of 16-Bit Reload Timer - Fujitsu MB90895 Series Hardware Manual

8.2

Block Diagram of 16-bit Reload Timer

The 16-bit reload timers 0 and 1 composed of the following seven blocks:
• Count clock generator
• Reload controller
• Output controller
• Operation controller
• 16-bit timer register (TMR)
• 16-bit reload register (TMRLR)
• Timer control status register (TMCSR)
I Block Diagram of 16-bit Reload Timer
Count clock generating circuit
Machine
clock
φ
Pin
TIN
-
Timer control status register (TMCSR)
Figure 8.2-1 Block Diagram of 16-bit Reload Timer
Internal data bus
TMRLR
16-bit reload register
TMR
16-bit timer register UF
CLK
Gate
input
3
Prescaler
Clear
Internal
clock
Input
control
selector
circuit
External
clock
3
2
Functional selection
- - - CSL1 CSL0 MOD2 MOD1
Reload signal
Valid
Wait signal
clock
judge
circuit
Output control
circuit
CLK
Output signal
Clock
generating circuit
Select
signal
MOD0 OUTE OUTL RELD INTE UF CNTE TRG
CHAPTER 8 16-bit reload timer
Reload
control circuit
Output to
internal
peripheral
function
Pin
TOT
EN
Operating
control circuit
Interrupt request
output
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