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G
Receive RTR register (RRTRR)
When a remote frame is stored in a message buffer, the bit corresponding to the number of the message
buffer is set.
G
Receive overrun register (ROVRR)
This register sets the bit corresponding to the number of the buffer that overruns when the message is
received.
G
Acceptance mask select register (AMSR)
This register sets the method for masking the receive message for each message buffer.
G
Acceptance mask registers (AMR0 and AMR1)
These registers set a mask with the ID for filtering the message to be received.
G
Last event indication register (LEIR)
This register indicates the operating state that last occurred.It indicates that either node status transition,
transmitting completion, or receiving completion occurred.
G
Prescaler
The prescaler generates a bit timing clock at a frequency of 1/1 to 1/64 of the system clock.
It sets the operation clock (TQ).
G
Bit timing generator
This generator detects a bit timing clock signal to generate a sync segment and time segments 1 and 2.
G
Node status transition interrupt generator
This generates a node status transition interrupt signal when the node status transits.
G
Bus state identification circuit
This circuit identifies the CAN bus state from the bus halt bit (CSR: HALT) and the signal from the error
frame generator.
G
Acceptance filter
This filter compares the receive message ID with the acceptance code to select the message to be received.
G
Transmit message buffers/receive message buffers
There are 8 message buffers to store the message to be transmitted and received.They store the message to
be transmitted and received.
G
CRC generator/ACK generator
This circuit generates a CRC field or an ACK field when a data frame or remote frame is transmitted.
CHAPTER 16 CAN controller
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