5.7
Program Example of Timebase Timer
Programming examples for the timebase timer are shown below.
Program Example of Timebase Timer
Processing specification
12
The 2
/HCLK (HCLK: oscillation clock) interval interrupt is generated repeatedly.In this case, the interval
time is approximately 1.0 ms (at 4-MHz operation).
Coding example
ICR02
EQU
TBTC
EQU
TBOF
EQU
TBIE
EQU
;-------Main program---------------------------------------
CODE
CSEG
START:
AND
MOV
MOV
SETB
MOV
OR
LOOP:
MOV
MOV
BRA
;-------Interrupt program------------------------------------
WARI:
CLRB
CLRB
.
User processing
.
SETB
RETI
CODE
ENDS
;-------Vector setting----------------------------------------
VECT
CSEG
ORG
DSL
ORG
DSL
DB
VECT
ENDS
END
0000B2H
;Time base timer interrupt control register
0000A9H
;Time base timer control register
TBTC:3
;Interrupt rquest flag bit
TBTC:2
;Interrupt enable bit
;Stack pointer(SP),already initialized
CCR,#0BFH
;Interrupt disable
I:ICR02 #00H
;Interrupt level 0(highest)
I:TBTC,#10000000B
;Upper 3 bis are fixed
;TBOF clear,
;Counter clear interval time
12
;2
I:TBIE
;Interrupt enable
ILM,#07H
;Setting ILM in PS to level 7
CCR,#40H
;Interrupt enable
A,#00H
;No limit roop
A,#01H
LOOP
I:TBIE
;Clear interrupt enable bit
I:TBOF
;Clear interrupt request flag
I:TBIE
;Interrupt enable
;Recovery from interrupt processing
ABS=0FFH
0FFBCH
;Vector setting to interrupt number #16(10
WARI
0FFDCH
;Reset bector setting
START
00H
;Setting to single chip mode
START
/HCLK selection
CHAPTER 5 Timebase timer
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