Setting Multiple Message Reception - Fujitsu MB90895 Series Hardware Manual

16 bit, controller manual
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CHAPTER 16 CAN controller
16.5.4

Setting Multiple Message Reception

• When there is insufficient time to receive messages such as frequently received
messages or messages with different IDs, more than one message buffer can be
combined to a multiple message buffer to give the CPU sufficient time to process
received messages.
• To configure multiple message buffers, perform the same setting of acceptance filter
of the message buffers to be combined.
I Setting Configuration of Multiple Message Buffer
When four messages in the standard frame format are received with doing the acceptance filter of message
buffers 5, 6 and 7 on the same settings, the multiple message buffer operates as shown in the figure.
Note:
When the acceptance mask select register is set to full - bit comparison (AMSR: AMSx.1,
AMSx.0 = 00
parison, the messages are always stored in the message buffer with the smaller number, so the
message buffers cannot be formed into a multiple message buffer.
550
), do not set the same acceptance code. When the register is set to full-bit com-
B

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