Table of Contents
Advertisement
CHAPTER 3 CPU
Figure 3.1-7 "Example of Bank Addressing" shows the relationships between the memory space divided
into banks and each register.
0 0 0 0 0 0
0 7 0 0 0 0
07FFFF
0B0000
0BFFFF
0D0000
0DFFFF
0F0000
0FFFFF
FF0000
FFFFFF
Note:
For details, see 3.2 "Dedicated Registers".
I Bank Addressing and Default Space
To improve the instruction code efficiency, the default space shown in Table 3.1-2 "Addressing and Default
Spaces" is determined for each instruction in each addressing type. To use any bank space other than the
default space, specify the prefix code for that bank space before the instruction, which makes the arbitrary
bank space corresponding to the prefix code accessible.
Table 3.1-2 Addressing and Default Spaces
Default Spaces
Program space
Data space
Stack space
Additional space
Note:
For details on the prefix codes, see 3.4 "Prefix Codes".
28
Figure 3.1-7 Example of Bank Addressing
H
H
System stack space
H
H
Data space
H
H
User stack space
H
H
Additional space
H
H
Program space
H
PC indirect addressing, program-access addressing, branch instruction
addressing
Addressing with @RW0, @RW1, @RW4, @RW5, @A, addr16, and dir
Addressing with PUSHW, POPW, @RW3, and @RW7PUSHW, POPW,
@RW3, @RW7
Addressing with @RW2 and @RW6@RW2, @RW6
07
SSB (System stack bank register)
H
0B
DTB (Data bank register)
H
0D
USB (User stack bank register)
H
0F
ADB (Additional bank register)
H
FF
PCB (Program bank register)
H
Addressing
Advertisement
Table of Contents
