Fujitsu MB90895 Series Hardware Manual page 378

16 bit, controller manual
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CHAPTER 13 8/10-bit A/D converter
Table 13.3-3 Function of Each Bit of A/D Control Status Register (Low) (ADCS: L) (1/2)
bit0
to
bit2
bit3
to
bit5
360
bit name
ANE2 to ANE0:
These bits set the channel at which A/D conversion terminated.
A/D conversion end
Start channel < end channel: A/D conversion starts at
channel select bits
channel set by A/D conversion start channel select bits
(ANS2 to ANS0) and terminates channel set by A/D
conversion end channel select bits (ANE2 to ANE0)
Start channel = end channel: A/D conversion is performed
only for one channel set by A/D converter end (= start)
channel select bits (ANE2 to ANE0 = ANS2 to ANS0).
Start channel > end channel: A/D conversion is performed
from channel set by A/D conversion start channel select bits
(ANS2 to ANS0) to AN7, and from AN0 to channel set by A/
D conversion end channel select bits (ANE2 to ANE0).
A/D conversion is performed up to the specified channel.
Continuous conversion mode and pause-conversion mode:
When A/D conversion terminated at the channel set by the
A/D conversion end channel select bits (ANE2 to ANE0), it
returns to the channel set by the A/D conversion start
channel select bits (ANS2 to ANS0).
Note:
ANS2 to ANS0:
These bits set the channel at which A/D conversion start.At read,
A/D conversion start
the channel number under A/D conversion or A/D-converted
channel select bits
immediately before A/D conversion pauses can be checked.
And before A/D conversion starts, the previous conversion
channel will be read even if these bits have already been set to
the new value. These bits are initialized to "000
Start channel < end channel: A/D conversion starts at channel
set by A/D conversion start channel select bits (ANS2 to ANS0)
and terminates channel set by A/D conversion end channel
select bits (ANE2 to ANE0)
Start channel = end channel: A/D conversion is performed only
for one channel set by A/D conversion (= end) channel select
bits (ANS2 to ANS0 = ANE2 to ANE0)
Start channel > end channel: A/D conversion is performed
from channel set by A/D conversion start channel select bits
(ANS2 to ANS0) to AN7, and from AN0 to channel set by A/D
conversion end channel select bits (ANE2 to ANE0).
Continuous conversion mode and pause-conversion mode:
When A/D conversion terminated at the channel set by the
A/D conversion end channel select bits (ANE2 to ANE0), it
returns to the channel set by the A/D conversion start
channel select bits (ANS2 to ANS0).
Read (During A/D conversion): The channel numbers (7 to
0) under A/D conversion are read.
Read (During a pause in pause conversion mode): At read
during a pause, the channel number A/D-converted
immediately before a pause is read.
Note:
Function
Do not set the A/D conversion end channel select bits
(ANE2 to ANE0) during A/D conversion.
Do not set the A/D conversion start channel bits (ANS2 to
ANS0) during A/D conversion.
" at reset.
B

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