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CHAPTER 4 I/O PORT
4.7.2
Operation of Port 5
The operation of port 5 is explained.
I Operation of Port 5
G
Operation of output port
• When the bit in the port 5 direction register (DDR5) corresponding to the output pin is set to 1, port 5
functions as an output port.
• When the output buffer is turned "ON2 and output data is written to the port 5 data register (PDR5), the
data is retained in the output latch and output from the pin.
• When the port 5 data register (PDR5) is read, the state of the output latch in the PDR5 is read.
Note:
If read modify write instructions (such as the bit set instruction) are used to read the PDR, the
pin set as an output port by the DDR outputs the desired data. To switch a pin from input port
to output port, write output data to the port data register and use the port direction register to
set the pin as an output port.
G
Operation of input port
• If the bit in the DDR5 corresponding to the input pin is set to 0, port 5 functions as an input port.
• The output buffer is turned "OFF" and the pin enters the high impedance state.
• When data is written to the port 5 data register (PDR5), it is retained in the output latch in the PDR5 but
not output to the pin.
• When the PDR5 is read, the level value (Low or High) of the pin is read.
G
Operation of analog input
• When using port 5 as an analog input pin, set the bit in the ADER corresponding to the analog input pin
to "1".Port 5 is disabled to operate as a general-purpose I/O port, and functions as an analog input pin.
• When the PDR5 is read with the bit set to analog input enabled, the read value is "0".
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