Fujitsu MB90895 Series Hardware Manual page 320

CHAPTER 10 8/16-bit PPG timer
Table 10.3-2 Functions of PPG0 Operation Mode Control Register (PPGC0)
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
302
bit name
Reserved: reserved bit Always set this bit to "1".
Unused bits Read: The value is undefined.
Write: No effect
PUF0: 8-bit PPG output 2-channel independent operation mode,
Underflow generation 8+8-bit PPG output operation mode: When the value of the
flag bit PPG0 down counter is decremented from "00
an underflow occurs (PUF0 = 1).
16-bit PPG output operation mode: When the values of the
PPG0 and PPG1 down counters are decremented from
"0000
• When an underflow occurs (PUF0 = 1) with an underflow
When set to "0": The bit is cleared.
When the bit is set to "1": No effect.
Read by read modify write instructions: "1" read
PIE0: This bit enables or disables an interrupt.
Underflow interrupt When set to "0": No interrupt request generated even at
enable bit underflow (PUF0 = 1).
When set to "1": Interrupt request generated at underflow
(PUF0 = 1)
PE0: This bit switches the PPG0 pin function to enable or disable the
PPG0 pin output enable pulse output.
bit When set to "0": Functions as general-purpose I/O port.
The pulse output is disabled.
When set to "1": PPG0 pin functions as PPG0 output pin.
The pulse output is enabled.
Unused bits Read: The value is undefined.
Write: No effect
PEN0: This bit enables or disables the count operation of the 8-/16-bit
PPG0 operation enable PPG timer 0.
bit When set to "0": Count operation disabled
When set to "1": Count operation enabled
• When the count operation is disabled (PEN0 = 0), the output
Function
" to "FFFF ", an underflow occurs (PUF0 = 1).
H H
interrupt enabled (PIE0 = 1), an interrupt request is generated.
is held at a Low level.
" to "FF ",
H H