Fujitsu MB90895 Series Hardware Manual page 672

16 bit, controller manual
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APPENDIX
Table A.8-18 10 String instructions
Mnemonic
MOVS / MOVSI
2
MOVSD
2
SCEQ / SCEQI
2
SCEQD
2
FILS / FILSI
2
MOVSW / MOVSWI
2
MOVSWD
2
SCWEQ / SCWEQI
2
SCWEQD
2
FILSW / FILSWI
2
*1: 5 when RW0 is 0, 4 + 7 x (RW0) when the counter expires, or 7n + 5 when a match occurs
*2: 5 when RW0 is 0; otherwise, 4 + 8 x (RW0)
*3: (b) x (RW0) + (b) x (RW0) When the source and destination access different areas, calculate the (b) item individually.
*4: (b) x n
*5: 2 x (RW0)
*6: (c) x (RW0) + (c) x (RW0) When the source and destination access different areas, calculate the (c) item individually.
*7: (c) x n
Note:
m: RW0 value (counter value), n: Loop count
See Table A.5-1 "Execution cycle counts in each addressing mode" and Table A.5-2 "Cycle count
correction values for counting execution cycles" for information on (a) to (d) in the table.
654
#
RG
B
*2
*5
*3
*2
*5
*3
*1
*5
*4
*1
*5
*4
6m+6
*5
*3
*2
*5
*6
*2
*5
*6
*1
*5
*7
*1
*5
*7
6m+6
*5
*6
Operation
byte transfer @AH+ <-- @AL+, counter = RW0
byte transfer @AH- <-- @AL-, counter = RW0
byte search @AH+ <-- AL, counter RW0
byte search @AH- <-- AL, counter RW0
byte fill @AH+ <-- AL, counter RW0
word transfer @AH+ <-- @AL+, counter = RW0
word transfer @AH- <-- @AL-, counter = RW0
word search @AH+ - AL, counter = RW0
word search @AH- - AL, counter = RW0
word fill @AH+ <-- AL, counter = RW0
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