Fujitsu MB90895 Series Hardware Manual page 23

16 bit, controller manual
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I CPU and peripheral functions of MB90895 series
Table 1.2-2 CPU and peripheral functions of MB90895 series (1/2)
CPU function
Low-power consumption (standby) mode
I/O port
Timebase timer
Watchdog timer
16-bit I/O
16-bit free-run timer
timer
Input capture
16-bit reload timer 1
Watch timer
8/16-bit PPG timer
Delayed interrupt generation module
DTP/external interrupt
MB90V495G
Number of basic instructions: 351 instructions
Instruction bit length: 8 bits, 16 bits
Instruction length: 1 byte to 7 bytes
Data bit length: 1 bit, 8 bits, 16 bits
Minimum instruction execution time: 62.5 ns (at a machine clock frequency of 16 MHz)
Interrupt operating time: Min 1.5 ms (at 16-MHz machine clock frequency)
Sleep mode/Watch mode/Timebase timer mode/Stop mode/CPU intermittent mode
General-purpose I/O ports (CMOS output): 34 (36 *)
They include four pins serving as high-current output ports (P14 to P17).
18-bit free-run counter
Interrupt cycle: 1.024ms,4.096ms,16.834ms,131.072ms
(Assuming an oscillation clock frequency of 4 MHz)
Reset generation cycle:3.58ms,14.33ms,57.23ms,458.75ms
(Assuming an oscillation clock frequency of 4 MHz)
Channel count: 1
interrupt by overflow generation
Channel count: 4
Free-run timer value held at pin input timing (rising edge, falling edge, both edges)
Channel count: 2
16-bit reload timer operation
Count Clock Cycle: 0.25µs,0.5µs,2.0µs
(Assuming a machine clock frequency of 16 MHz)
External event countable
15-bit free-run counter
Interrupt cycle: 31.25ms,62.5ms,12ms,250ms,500ms,1.0s,2.0s
(Assuming a subclock frequency of 8.192 kHz)
Channel count: 2 (operable with 8 bits x 4 channels)
PPG operable with 8 bits x 4 channels or 16 bits x 1 channel
Pulse waveform output at arbitrary cycle and duty
Count clock: 62.5 ns to 1 µs
(Assuming a machine clock frequency of 16 MHz)
Interrupt generation module for task switching
Used for Real-time OS
Input count: 4
Capable of starting at the rising or falling edge or High or Low level input and of using
external interrupts and Extended Intelligent I/O Service (EI
CHAPTER 1 OVERVIEW
MB90F897/S
2
OS)
5

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