16-Bit Dead Timer Control Register (Dtcr0 To Dtcr2) - Fujitsu MB91260B Series Hardware Manual

11.4.11

16-bit Dead Timer Control Register (DTCR0 to DTCR2)

The 16-bit dead timer control register (DTCR0 to DTCR2) is used to control the
operation mode of the waveform generator, the interrupt request enable, the interrupt
request flag, the GATE signal enable, and the output level polarity.
■ 16-bit Dead Timer Control Register (DTCR0)
16-bit dead timer control register
Bit15 Bit14
DMOD0 GTEN1
R/W
R/W: Readable/Writable
: Initial value
Bit13 Bit12 Bit11
GTEN0 TMIF0 TMIE0
R/W R/W R/W R/W
TMD2 TMD1 TMD0
TMIE0
TMIF0
GTEN0
GTEN1
DMOD0
CHAPTER 11 MULTIFUNCTIONAL TIMER
Bit10 Bit9 Bit8
TMD2 TMD1 TMD0
R/W R/W R/W
0 0 0 Waveform generator stops.
0 0 1
PPG0 timer outputs pulse while RT signal is at "H".
Rising edge of each RT signal becomes trigger,
0 0
1
and 16-bit dead timer stars. The PPG timer outputs
pulse until the 16-bit dead timer stops. (timer mode)
Non-overlap signal is generated by the RT
1 0
0
signal. (dead time timer mode)
Non-overlap signal is generated by PPG0
1 1
1
timers. (dead time timer mode)
Other
Interrupt request enable bit, software trigger bit
Interrupt is not generated even though underflow is generated
0
in 16-bit dead timer.
Interrupt is generated when underflow is generated in 16-bit
1
dead timer.
Interrupt request flag bit
Read
Underflow of counter is not
0
detected.
Underflow of counter is
1
detected.
GATE signal control bit 0
0 The GATE signal is not controlled by RT0. (asynchronous mode)
1 The GATE signal is controlled by RT0. (synchronous mode)
GATE signal control bit 1
0 The GATE signal is not controlled by RT1. (asynchronous mode)
1 The GATE signal is controlled by RT1. (synchronous mode)
Output polarity control bit
0 Normal polarity output
1 Reverse polarity output
DTCR0
Address: 0000C4
H
Initial value: 00000000
B
Operation mode bit
Disable
Write
This bit is cleared.
No effect on this bit.
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