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CHAPTER 14 UART0
G
Clock Supply
In the clock synchronous mode, count of clocks equal to the transmit and receive bits count must be
supplied.
• When data is transmitted with the internal clock (dedicated baud rate generator or internal timer)
selected (SMR0: CS2 to CS0 = "000
reception is generated automatically.
• When an external clock is been selected (SMR0: CS2 to CS0 = "111
byte must be supplied from the external clock after it is ensured that data to be transmitted is present
(SSR0: TDRE = 0) in the serial output data register 0 (SODR0) of the UART0. Also, before and after
transmitting, always return to the mark level (High level).
G
Error detection
Only overrun errors can be detected.Parity and framing errors cannot be detected.
G
Setting of register
Table 14.6-2 shows the setting of the control register in transmitting serial data from the transmitting end to
the receiving end using the clock synchronous mode (operation mode 2).
Table 14.6-2 Setting of Control Register
Register Name
bit name
Serial mode
MD1,MD0
register 0
(SMR0)
CS2,CS1,
CS0
SCKE
SOE
Serial control
PEN
register (SCR)
CL
REC
TXE
RXE
Serial status
TIE
register (SSR)
RIE
G
Starting communications
Communication is started when transmit data is written to serial output data register 0 (SODR0).When
starting communication even for reception only, it is always necessary to write dummy transmit data to
serial output data register 0 (SODR0).
420
B
Transmit End (output serial clock)
Set clock synchronous mode (MD1, MD0 = "10
Set clock input source.
• Dedicated baud rate generator (CS2 to
"
"
CS0 = "000
to "100
)
B
B
• Internal timer (CS2 to CS0 = "110
Set serial clock output (SCKE = 1).
Set serial data output pin (SOE = 1).
Do not add parity bit (PEN = 0).
Initialize error flag (REC = 0).
Enable transmitting (TXE = 1).
Disable receiving (RXE = 0).
Enable transmitting (TIE = 1)
Disable receiving (RIE = 0).
" to "100
" or "110
"), the synchronous clock signal for data
B
B
Setting
Receive End (input serial clock)
Set clock input source.
• External clock (CS2 to CS0="111
"
)
B
Set serial clock input (SCKE = 0).
Set general-purpose I/O port (SOE = 0).
8-bit data length (CL = 1)
Disable transmitting (TXE = 0).
Enable receiving (RXE = 1).
Disable transmitting (TIE = 0)
Enable receiving (RIE = 1).
"), the clock signal for exact one
B
"
).
B
")
B
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