Detect Address Setting Registers (Padr0, Padr1) - Fujitsu MB90895 Series Hardware Manual

17.3.2

Detect address setting registers (PADR0, PADR1)

The value of an address to be detected is set in the detect address setting
registers.When the address of the instruction processed by the program matches the
address set in the detect address setting registers, the next instruction is forcibly
replaced by the INT9 instruction, and the interrupt processing program is executed.
I Detect address setting registers (PADR0, PADR1)
Figure 17.3-3 Detect address setting registers (PADR0, PADR1)
PADR0 PADR1 : High
PADR0 PADR1 : Middle
PADR0 PADR1 : Low
R/W : Read/Write
X : Undefined
bit7 bit6 bit5 bit4
D23 D22 D21 D20
R/W R/W R/W R/W
bit15 bit14 bit13 bit12 bit11 bit10 bit9
D15 D14 D13 D12 D11
R/W R/W R/W R/W R/W
bit7 bit6 bit5 bit4
D7 D6 D5 D4
R/W R/W R/W R/W
CHAPTER 17 Address Match Detecting Function
bit3 bit2 bit1 bit0
D19 D18 D17 D16
R/W R/W R/W R/W
bit8
D10 D9 D8
R/W R/W R/W
bit3 bit2 bit1 bit0
D3 D2 D1 D0
R/W R/W R/W R/W
Reset value
XXXXXXXX
B
Reset value
XXXXXXXX
B
Reset value
XXXXXXXX
B
561