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CHAPTER 8 16-bit reload timer
8.6
Precautions when Using 16-bit Reload Timer
This section explains the precautions when using the 16-bit reload timer.
I Precautions when Using 16-bit Reload Timer
G
Precautions when using programs to set timebase timer
• Set the 16-bit reload register (TMRLR) after disabling the timer operation (TMCSR: CNTE = 0)
• The 16-bit timer register (TMR) can be read during the TMR count operation. However, always use the
word instruction (MOVW).
• Change the CSL1 and CSL0 bits in the TMCSR after disabling the timer operation (TMCSR: CNTE =
0)
G
Precautions on interrupt
• When the UF bit in the TMCSR is set to "1" and the underflow interrupt output is enabled (TMCSR:
INTE = 1), it is impossible to return from interrupt processing.However, when the EI
UF bit is cleared automatically.
• When using the EI
requests by resources that share the interrupt control register (ICR) with the 16-bit reload timer.
272
2
OS in the 16-bit reload timer, it is necessary to disable generation of interrupt
2
OS is used, the
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