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Operation in 8+8-bit PPG output operation mode
• The PPG0 operates as the prescaler of the PPG timer and the PPG1 operates using the PPG0 output as a
clock source.
• When the pin output is enabled (PPGC0: PE0 = 1, PPGC1: PE1 = 1), the PPG0 pulse wave is output
from the PPG0 pin and the PPG1 pulse wave is output from the PPG1 pin.
• When the reload value is set in the PPG reload registers (PRLL0/PRLH0, PRLL1/PRLH1) to enable
operation of the PPG timer (PPGC0: PEN0 = 1 and PPGC1: PEN1 = 1), the PPG down counter starts
counting.
• To stop the count operation of the PPG down counters, disable the operation of the PPG timers of both
channels (PPGC0: PEN0 = 0 and PPGC1: PEN1 = 0).The count operation of the PPG down counter is
stopped and the output of the PPG output pin is held at a Low level.
• When the PPG down counter of each channel underflows, the reload values set in the PPG reload
registers (PRLL0/PRLH0 and PRLL1/PRLH1) are reloaded to the PPG down counter that underflows.
• When an underflow occurs, the underflow generation flag bit in the channel that causes an underflow is
set (PPGC0: PUF0 = 1, PPGC1: PUF1 = 1).If an interrupt request is enabled at the channel that causes
an underflow (PPGC0: PIE0 = 1, PPGC1: PIE1 = 1), the interrupt request is generated.
Notes:
• Do not operate PPG1 (PPGC1: PEN1 = 1) when PPG0 is stopped (PPGC0: PEN0 = 0).
• It is recommended to set the same value in both Low-level and High-level PPG reload
registers (PRLL0/PRLH0, PRLL1/PRLH1).
CHAPTER 10 8/16-bit PPG timer
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