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3.6.3
Reset Operation
During reset operation, the mode for reading mode data and reset vectors is set
according to the settings of the mode pins (MD0 to MD2) and a mode fetch is executed.
When the oscillation clock is returned from stop states (power on, stop mode) by a
reset, a mode fetch is executed after the elapse of the main clock oscillation
stabilization wait time.
I Flowchart of Reset Operation
Figure 3.6-3 shows the flowchart of reset operation.
Reset operation
Reset cancel
Reset sequence
Normal operation
(RUN state)
I Oscillation Stabilization Wait Time in Standby Mode
When a reset occurs during operation in a stop mode or sub clock mode in which the oscillation clock is
stopped, and oscillation stabilization wait time of 2
clock operates at 4 MHz) is generated. MB90V495G requires an oscillation stabilization wait time of
17
2
/HCLK (about 32.77 ms).
Reference:
For standby mode operation, see 3.8 "Low-power Consumption Mode".
I Mode Pin
The MD0 to MD2 mode pins are external pins. They are used to set the mode for reading data and reset
vectors.
Reference:
For details on the mode pins (MD0 to MD2), see 3.9.3" Memory Access Mode".
Figure 3.6-3 Flowchart of Reset Operation
Power-on-reset
Oscillation stabilization waiting time
Mode data fetched
Reset vector fetched
Execution of processing from
address that reset vector shows
Software reset
External reset (RST pin)
Watchdog timer reset
Bus mode pin setting
15
/HCLK (approximately 8.19 ms when the oscillation
CHAPTER 3 CPU
101
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