Timer Counter Data Register (Tcdt) - Fujitsu MB90895 Series Hardware Manual

7.3.2

Timer counter data register (TCDT)

The timer counter data register (TCDT) is a 16-bit up counter.At read the register value
being counted is read.At write while the counter is stopped, any count value can be set.
I Timer counter data register (TCDT)
Timer counter data
register (TCDT): upper
Timer counter data
register (TCDT): lower
R/W : Read /Write
I Count Operation of Timer Counter Data Register (TCDT)
• When the timer counter data register (TCDT) is read during the count operation, the count value of the
16-bit free-run timer is read.
• When the count value of the timer counter data register (TCDT) increments from "FFFF
an overflow occurs and the overflow generation flag bit (TCCS: IVF) is also set to "1".
• When an overflow occurs (TCCS: IVF = 1) with an overflow interrupt enabled (TCCS: IVFE = 1), an
overflow interrupt request is generated.
• The count value of the timer counter data register (TCDT) is retained while the count operation is
stopped.
• When stopping the count operation of the timer counter data register (TCDT), write 1 to the timer count
operation bit (TCCS: STOP).
• When the count operation stops (TCCS: STOP = 1), the counter of the timer counter data register
(TCDT) can be set to any value.
Figure 7.3-3 Timer counter data register (TCDT)
bit15 bit14 bit13 bit12 bit11 bit10 bit9
T15 T14 T13
R/W R/W R/W
bit7 bit6 bit5
T7 T6 T5
R/W R/W R/W
bit8
T12 T11 T10 T9
R/W R/W R/W R/W R/W
bit4 bit3 bit2 bit1
T4 T3 T2 T1
R/W R/W R/W R/W
CHAPTER 7 16-bit I/O timer
Reset value
T8
0 0 0 0 0 0 0 0
B
bit0
Reset value
T0
0 0 0 0 0 0 0 0
B
R/W
" to "0000
H
",
H
231