Configuration Of Watch Timer - Fujitsu MB90895 Series Hardware Manual

16 bit, controller manual
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CHAPTER 9 Watch timer
9.3

Configuration of Watch Timer

This section explains the registers and interrupt factors of the watch timer.
I List of Registers and Reset Values of Watch Timer
Figure 9.3-1 List of Registers and Reset Values of Watch Timer
Watch timer control register (WTC)
: Undefined
I Generation of Interrupt Request from Watch Timer
• When the interval time set by the interval time select bits (WTC: WTC2 to WTC0) is reached, the
overflow flag bit (WTC: WTOF) is set to "1".
• When the overflow flag bit is set (WTC: WTOF = 1) and with interrupt enabled when the watch timer
counter overflows (carries) (WTC: WTIE = 1), an interrupt request is generated.
282
bit
7
6
5
1
X
0
0
4
3
2
1
0
0
0
0
0

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