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15.3.1
Serial control register 1 (SCR1)
The serial control register 1 (SCR1) performs the following: setting parity bit, selecting
stop bit length and data length, selecting frame data format in operation mode 1,
clearing receive error flag, and enabling/disabling of transmitting/receiving.
I Serial control register 1 (SCR1)
15
13
14
R/W
R/W
R/W
R/W
: Read/write
W
: Write only
: Reset value
Figure 15.3-2 Serial control register 1 (SCR1)
12
11
10
9
8
R/W
R/W
W
R/W
R/W
bit8
TXE
bit9
RXE
bit10
REC
bit11
A/D
bit12
CL
bit13
SBL
bit14
bit15
PEN
Reset value
00000100
B
Transmission enable bit
Transmission disabled
0
1
Transmission enabled
Reception enable bit
Reception disabled
0
1
Reception enabled
Reception error flag clear bit
0
Clear PE, ORE and FRE bit
1
No effection
Address/data select bit
Data frame
0
1
Address frame
Data length select bit
0
7 bits
1
8 bits
Stop bit length select bit
1 bit length
0
1
2 bits length
Parity select bit
P
Valid only with parity (PEN = 1)
Even parity
0
1
Odd parity
Parity additional enable bit
Without parity
0
1
With parity
CHAPTER 15 UART1
437
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