Fujitsu MB90895 Series Hardware Manual page 560

16 bit, controller manual
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CHAPTER 16 CAN controller
G
Reception overrun
When another received message is stored in the message buffer that has completed receiving (RCR: RCx =
1), a reception overrun occurs.When a reception overrun occurs, "1" is set to the ROVRx bit in the
reception overrun register corresponding to the number of the message buffer (x) where the reception
overrun occurs.
G
Processing for reception of data frame and remote frame
Processing for reception of data frame
• The reception RTR register is cleared (RRTRR: RRTRx = 0).
• The transmission request register is cleared (TREQR: TREQx = 0) immediately before the received
message is stored.A transmission request to the message buffer (x) that does not perform transmitting is
cancelled.
Note:
Either the request to transmit a data frame or a remote frame is cancelled.
Processing for reception of remote frame
• The reception RTR register is set (RRTRR: RRTRx = 1).
• If the transmission RTR register is set (TRTRR: TRTRx = 1), the transmission request register is cleared
(TREQx = 0).The request to transmit a remote frame to the message buffer (x) that does not perform
transmitting is cancelled.
Note:
The request to transmit a data frame is not cancelled.
For details about how to cancel a transmit request, see Canceling transmit request.
G
Completing receiving
When the received message is stored, the reception complete register is set.If the reception complete
interrupt enable register is set (RIER: RIEx = 1), an interrupt is generated when receiving is completed
(RCR: RCx = 1).
Note:
The CAN controller cannot receive any message transmitted by itself.
542

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