Configuration Of Address Match Detection Function - Fujitsu MB90895 Series Hardware Manual

16 bit, controller manual
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CHAPTER 17 Address Match Detecting Function
17.3

Configuration of Address Match Detection Function

This section details the registers used by the address match detection function.
I List of Registers and Reset Values of Address Match Detection Function
Figure 17.3-1 List of Registers and Reset Values of Address Match Detection Function
Address detection control registes (PACSR)
Detect address setting registers 0 (PADR0)
: High
Detect address setting registers 0 (PADR0)
: Middle
Detect address setting registers 0 (PADR0)
: Low
Detect address setting registers 1 (PADR1)
: High
Detect address setting registers 1 (PADR1)
:Middle
Detect address setting registers 1 (PADR1)
:Low
: Undefined
558
bit
7
6
5
0
0
0
0
bit
7
6
5
bit
15
14
13
12
bit
7
6
5
bit
7
6
5
bit
15
14
13
12
bit
7
6
5
4
3
2
1
0
0
0
0
0
4
3
2
1
0
11
10
9
8
4
3
2
1
0
4
3
2
1
0
11
10
9
8
4
3
2
1
0

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