Fujitsu MB90895 Series Hardware Manual page 381

16 bit, controller manual
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Table 13.3-4 Functions of A/D Data Register (High) (ADCR: H)
bit name
bit11
CT1, CT0:
bit12
Compare time select bits
bit13
ST1, ST0:
bit14
Sampling time select bits
bit15
S10:
Resolution select bit
Function
These bits set the A/D conversion compare time.
• These bits set the time required from when analog input is A/
D-converted until it is stored in the data bits (D9 to D0).
Note:
The setting of CT1 and CT0 = "00
8 MHz.Setting based on operation at 16 MHz does not
assure normal operation.When read, these bits return "00
These bits set the A/D conversion sampling time.
• These bits set the time required from when A/D conversion
starts until the input analog voltage is sampled and held by
the sample & hold circuit.
Note:
The setting of ST1 and ST0 = "00
8 MHz.Setting based on operation at 16 MHz does not
assure normal operation.When these bits are read,
"00
" is read.
B
This bit selects the A/D conversion resolution.
When set to "0": Sets A/D conversion resolution in 10 bits
from A/D conversion data bits D9 to D0
When set to "1": Sets A/D conversion resolution in 8 bits
from A/D conversion data bits D7 to D0
Note:
Change the S10 bit in the pausing state before starting A/D
conversion.Changing the S10 bit after A/D conversion starts
disables the A/D conversion results stored in the A/D
conversion data bits (D9 to D0).
CHAPTER 13 8/10-bit A/D converter
" is based on operation at
B
".
B
" is based on operation at
B
363

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